\documentclass[11pt,twoside]{article}\makeatletter

\IfFileExists{xcolor.sty}%
  {\RequirePackage{xcolor}}%
  {\RequirePackage{color}}
\usepackage{colortbl}
\usepackage{wrapfig}
\usepackage{ifxetex}
\ifxetex
  \usepackage{fontspec}
  \usepackage{xunicode}
  \catcode`⃥=\active \def⃥{\textbackslash}
  \catcode`❴=\active \def❴{\{}
  \catcode`❵=\active \def❵{\}}
  \def\textJapanese{\fontspec{Noto Sans CJK JP}}
  \def\textChinese{\fontspec{Noto Sans CJK SC}}
  \def\textKorean{\fontspec{Noto Sans CJK KR}}
  \setmonofont{DejaVu Sans Mono}
  
\else
  \IfFileExists{utf8x.def}%
   {\usepackage[utf8x]{inputenc}
      \PrerenderUnicode{–}
    }%
   {\usepackage[utf8]{inputenc}}
  \usepackage[english]{babel}
  \usepackage[T1]{fontenc}
  \usepackage{float}
  \usepackage[]{ucs}
  \uc@dclc{8421}{default}{\textbackslash }
  \uc@dclc{10100}{default}{\{}
  \uc@dclc{10101}{default}{\}}
  \uc@dclc{8491}{default}{\AA{}}
  \uc@dclc{8239}{default}{\,}
  \uc@dclc{20154}{default}{ }
  \uc@dclc{10148}{default}{>}
  \def\textschwa{\rotatebox{-90}{e}}
  \def\textJapanese{}
  \def\textChinese{}
  \IfFileExists{tipa.sty}{\usepackage{tipa}}{}
\fi
\def\exampleFont{\ttfamily\small}
\DeclareTextSymbol{\textpi}{OML}{25}
\usepackage{relsize}
\RequirePackage{array}
\def\@testpach{\@chclass
 \ifnum \@lastchclass=6 \@ne \@chnum \@ne \else
  \ifnum \@lastchclass=7 5 \else
   \ifnum \@lastchclass=8 \tw@ \else
    \ifnum \@lastchclass=9 \thr@@
   \else \z@
   \ifnum \@lastchclass = 10 \else
   \edef\@nextchar{\expandafter\string\@nextchar}%
   \@chnum
   \if \@nextchar c\z@ \else
    \if \@nextchar l\@ne \else
     \if \@nextchar r\tw@ \else
   \z@ \@chclass
   \if\@nextchar |\@ne \else
    \if \@nextchar !6 \else
     \if \@nextchar @7 \else
      \if \@nextchar (8 \else
       \if \@nextchar )9 \else
  10
  \@chnum
  \if \@nextchar m\thr@@\else
   \if \@nextchar p4 \else
    \if \@nextchar b5 \else
   \z@ \@chclass \z@ \@preamerr \z@ \fi \fi \fi \fi
   \fi \fi  \fi  \fi  \fi  \fi  \fi \fi \fi \fi \fi \fi}
\gdef\arraybackslash{\let\\=\@arraycr}
\def\@textsubscript#1{{\m@th\ensuremath{_{\mbox{\fontsize\sf@size\z@#1}}}}}
\def\Panel#1#2#3#4{\multicolumn{#3}{){\columncolor{#2}}#4}{#1}}
\def\abbr{}
\def\corr{}
\def\expan{}
\def\gap{}
\def\orig{}
\def\reg{}
\def\ref{}
\def\sic{}
\def\persName{}\def\name{}
\def\placeName{}
\def\orgName{}
\def\textcal#1{{\fontspec{Lucida Calligraphy}#1}}
\def\textgothic#1{{\fontspec{Lucida Blackletter}#1}}
\def\textlarge#1{{\large #1}}
\def\textoverbar#1{\ensuremath{\overline{#1}}}
\def\textquoted#1{‘#1’}
\def\textsmall#1{{\small #1}}
\def\textsubscript#1{\@textsubscript{\selectfont#1}}
\def\textxi{\ensuremath{\xi}}
\def\titlem{\itshape}
\newenvironment{biblfree}{}{\ifvmode\par\fi }
\newenvironment{bibl}{}{}
\newenvironment{byline}{\vskip6pt\itshape\fontsize{16pt}{18pt}\selectfont}{\par }
\newenvironment{citbibl}{}{\ifvmode\par\fi }
\newenvironment{docAuthor}{\ifvmode\vskip4pt\fontsize{16pt}{18pt}\selectfont\fi\itshape}{\ifvmode\par\fi }
\newenvironment{docDate}{}{\ifvmode\par\fi }
\newenvironment{docImprint}{\vskip 6pt}{\ifvmode\par\fi }
\newenvironment{docTitle}{\vskip6pt\bfseries\fontsize{22pt}{25pt}\selectfont}{\par }
\newenvironment{msHead}{\vskip 6pt}{\par}
\newenvironment{msItem}{\vskip 6pt}{\par}
\newenvironment{rubric}{}{}
\newenvironment{titlePart}{}{\par }

\newcolumntype{L}[1]{){\raggedright\arraybackslash}p{#1}}
\newcolumntype{C}[1]{){\centering\arraybackslash}p{#1}}
\newcolumntype{R}[1]{){\raggedleft\arraybackslash}p{#1}}
\newcolumntype{P}[1]{){\arraybackslash}p{#1}}
\newcolumntype{B}[1]{){\arraybackslash}b{#1}}
\newcolumntype{M}[1]{){\arraybackslash}m{#1}}
\definecolor{label}{gray}{0.75}
\def\unusedattribute#1{\sout{\textcolor{label}{#1}}}
\DeclareRobustCommand*{\xref}{\hyper@normalise\xref@}
\def\xref@#1#2{\hyper@linkurl{#2}{#1}}
\begingroup
\catcode`\_=\active
\gdef_#1{\ensuremath{\sb{\mathrm{#1}}}}
\endgroup
\mathcode`\_=\string"8000
\catcode`\_=12\relax

\usepackage[a4paper,twoside,lmargin=1in,rmargin=1in,tmargin=1in,bmargin=1in,marginparwidth=0.75in]{geometry}
\usepackage{framed}

\definecolor{shadecolor}{gray}{0.95}
\usepackage{longtable}
\usepackage[normalem]{ulem}
\usepackage{fancyvrb}
\usepackage{fancyhdr}
\usepackage{graphicx}
\usepackage{marginnote}

\renewcommand{\@cite}[1]{#1}


\renewcommand*{\marginfont}{\itshape\footnotesize}

\def\Gin@extensions{.pdf,.png,.jpg,.mps,.tif}

  \pagestyle{fancy}

\usepackage[pdftitle={Virtual Processor based on Hybrid Processor},
 pdfauthor={}]{hyperref}
\hyperbaseurl{}

	 \paperwidth210mm
	 \paperheight297mm
              
\def\@pnumwidth{1.55em}
\def\@tocrmarg {2.55em}
\def\@dotsep{4.5}
\setcounter{tocdepth}{3}
\clubpenalty=8000
\emergencystretch 3em
\hbadness=4000
\hyphenpenalty=400
\pretolerance=750
\tolerance=2000
\vbadness=4000
\widowpenalty=10000

\renewcommand\section{\@startsection {section}{1}{\z@}%
     {-1.75ex \@plus -0.5ex \@minus -.2ex}%
     {0.5ex \@plus .2ex}%
     {\reset@font\Large\bfseries}}
\renewcommand\subsection{\@startsection{subsection}{2}{\z@}%
     {-1.75ex\@plus -0.5ex \@minus- .2ex}%
     {0.5ex \@plus .2ex}%
     {\reset@font\Large}}
\renewcommand\subsubsection{\@startsection{subsubsection}{3}{\z@}%
     {-1.5ex\@plus -0.35ex \@minus -.2ex}%
     {0.5ex \@plus .2ex}%
     {\reset@font\large}}
\renewcommand\paragraph{\@startsection{paragraph}{4}{\z@}%
     {-1ex \@plus-0.35ex \@minus -0.2ex}%
     {0.5ex \@plus .2ex}%
     {\reset@font\normalsize}}
\renewcommand\subparagraph{\@startsection{subparagraph}{5}{\parindent}%
     {1.5ex \@plus1ex \@minus .2ex}%
     {-1em}%
     {\reset@font\normalsize\bfseries}}


\def\l@section#1#2{\addpenalty{\@secpenalty} \addvspace{1.0em plus 1pt}
 \@tempdima 1.5em \begingroup
 \parindent \z@ \rightskip \@pnumwidth 
 \parfillskip -\@pnumwidth 
 \bfseries \leavevmode #1\hfil \hbox to\@pnumwidth{\hss #2}\par
 \endgroup}
\def\l@subsection{\@dottedtocline{2}{1.5em}{2.3em}}
\def\l@subsubsection{\@dottedtocline{3}{3.8em}{3.2em}}
\def\l@paragraph{\@dottedtocline{4}{7.0em}{4.1em}}
\def\l@subparagraph{\@dottedtocline{5}{10em}{5em}}
\@ifundefined{c@section}{\newcounter{section}}{}
\@ifundefined{c@chapter}{\newcounter{chapter}}{}
\newif\if@mainmatter 
\@mainmattertrue
\def\chaptername{Chapter}
\def\frontmatter{%
  \pagenumbering{roman}
  \def\thechapter{\@roman\c@chapter}
  \def\theHchapter{\roman{chapter}}
  \def\thesection{\@roman\c@section}
  \def\theHsection{\roman{section}}
  \def\@chapapp{}%
}
\def\mainmatter{%
  \cleardoublepage
  \def\thechapter{\@arabic\c@chapter}
  \setcounter{chapter}{0}
  \setcounter{section}{0}
  \pagenumbering{arabic}
  \setcounter{secnumdepth}{6}
  \def\@chapapp{\chaptername}%
  \def\theHchapter{\arabic{chapter}}
  \def\thesection{\@arabic\c@section}
  \def\theHsection{\arabic{section}}
}
\def\backmatter{%
  \cleardoublepage
  \setcounter{chapter}{0}
  \setcounter{section}{0}
  \setcounter{secnumdepth}{2}
  \def\@chapapp{\appendixname}%
  \def\thechapter{\@Alph\c@chapter}
  \def\theHchapter{\Alph{chapter}}
  \appendix
}
\newenvironment{bibitemlist}[1]{%
   \list{\@biblabel{\@arabic\c@enumiv}}%
       {\settowidth\labelwidth{\@biblabel{#1}}%
        \leftmargin\labelwidth
        \advance\leftmargin\labelsep
        \@openbib@code
        \usecounter{enumiv}%
        \let\p@enumiv\@empty
        \renewcommand\theenumiv{\@arabic\c@enumiv}%
	}%
  \sloppy
  \clubpenalty4000
  \@clubpenalty \clubpenalty
  \widowpenalty4000%
  \sfcode`\.\@m}%
  {\def\@noitemerr
    {\@latex@warning{Empty `bibitemlist' environment}}%
    \endlist}

\def\tableofcontents{\section*{\contentsname}\@starttoc{toc}}
\parskip0pt
\parindent1em
\def\Panel#1#2#3#4{\multicolumn{#3}{){\columncolor{#2}}#4}{#1}}
\newenvironment{reflist}{%
  \begin{raggedright}\begin{list}{}
  {%
   \setlength{\topsep}{0pt}%
   \setlength{\rightmargin}{0.25in}%
   \setlength{\itemsep}{0pt}%
   \setlength{\itemindent}{0pt}%
   \setlength{\parskip}{0pt}%
   \setlength{\parsep}{2pt}%
   \def\makelabel##1{\itshape ##1}}%
  }
  {\end{list}\end{raggedright}}
\newenvironment{sansreflist}{%
  \begin{raggedright}\begin{list}{}
  {%
   \setlength{\topsep}{0pt}%
   \setlength{\rightmargin}{0.25in}%
   \setlength{\itemindent}{0pt}%
   \setlength{\parskip}{0pt}%
   \setlength{\itemsep}{0pt}%
   \setlength{\parsep}{2pt}%
   \def\makelabel##1{\upshape ##1}}%
  }
  {\end{list}\end{raggedright}}
\newenvironment{specHead}[2]%
 {\vspace{20pt}\hrule\vspace{10pt}%
  \phantomsection\label{#1}\markright{#2}%

  \pdfbookmark[2]{#2}{#1}%
  \hspace{-0.75in}{\bfseries\fontsize{16pt}{18pt}\selectfont#2}%
  }{}
      \def\TheFullDate{2019-01-15 (revised: 15 January 2019)}
\def\TheID{\makeatother }
\def\TheDate{2019-01-15}
\title{Virtual Processor based on Hybrid Processor}
\author{}\makeatletter 
\makeatletter
\newcommand*{\cleartoleftpage}{%
  \clearpage
    \if@twoside
    \ifodd\c@page
      \hbox{}\newpage
      \if@twocolumn
        \hbox{}\newpage
      \fi
    \fi
  \fi
}
\makeatother
\makeatletter
\thispagestyle{empty}
\markright{\@title}\markboth{\@title}{\@author}
\renewcommand\small{\@setfontsize\small{9pt}{11pt}\abovedisplayskip 8.5\p@ plus3\p@ minus4\p@
\belowdisplayskip \abovedisplayskip
\abovedisplayshortskip \z@ plus2\p@
\belowdisplayshortskip 4\p@ plus2\p@ minus2\p@
\def\@listi{\leftmargin\leftmargini
               \topsep 2\p@ plus1\p@ minus1\p@
               \parsep 2\p@ plus\p@ minus\p@
               \itemsep 1pt}
}
\makeatother
\fvset{frame=single,numberblanklines=false,xleftmargin=5mm,xrightmargin=5mm}
\fancyhf{} 
\setlength{\headheight}{14pt}
\fancyhead[LE]{\bfseries\leftmark} 
\fancyhead[RO]{\bfseries\rightmark} 
\fancyfoot[RO]{}
\fancyfoot[CO]{\thepage}
\fancyfoot[LO]{\TheID}
\fancyfoot[LE]{}
\fancyfoot[CE]{\thepage}
\fancyfoot[RE]{\TheID}
\hypersetup{citebordercolor=0.75 0.75 0.75,linkbordercolor=0.75 0.75 0.75,urlbordercolor=0.75 0.75 0.75,bookmarksnumbered=true}
\fancypagestyle{plain}{\fancyhead{}\renewcommand{\headrulewidth}{0pt}}

\date{}
\usepackage{authblk}

\providecommand{\keywords}[1]
{
\footnotesize
  \textbf{\textit{Index terms---}} #1
}

\usepackage{graphicx,xcolor}
\definecolor{GJBlue}{HTML}{273B81}
\definecolor{GJLightBlue}{HTML}{0A9DD9}
\definecolor{GJMediumGrey}{HTML}{6D6E70}
\definecolor{GJLightGrey}{HTML}{929497} 

\renewenvironment{abstract}{%
   \setlength{\parindent}{0pt}\raggedright
   \textcolor{GJMediumGrey}{\rule{\textwidth}{2pt}}
   \vskip16pt
   \textcolor{GJBlue}{\large\bfseries\abstractname\space}
}{%   
   \vskip8pt
   \textcolor{GJMediumGrey}{\rule{\textwidth}{2pt}}
   \vskip16pt
}

\usepackage[absolute,overlay]{textpos}

\makeatother 
      \usepackage{lineno}
      \linenumbers
      
\begin{document}

             \author[1]{Akram Saleh  Almansoub}

             \author[2]{Qi  Deyu}

             \author[3]{Fares  Aqlan}

             \author[4]{Abdullah  Alqwbani}

             \affil[1]{  South China University of Technology}

\renewcommand\Authands{ and }

\date{\small \em Received: 12 December 2018 Accepted: 4 January 2019 Published: 15 January 2019}

\maketitle


\begin{abstract}
        


This proposal presents a robust method through which virtualization can be optimized by the use of a hybrid processor. The discourse acknowledges that virtualization has become a key constituent of machine processing and efficiency through building virtual machine clusters that can be universally integrated to harness the utilization of hardware computing resources. As observed in low-level computing paradigms, the traditional x86 architecture was only capable of classical trapping to deploy virtualization, yielding para-virtualization. In response, virtual processors based on hybrid processors with hardware-assisted paging enables the handling of foreign Memory Management Unit (MMU) operations and translates the corresponding physical address to actual machine-controlled dynamic addresses, improving memory bound executions as well as the overall output of the HVM. This architecture derives a more powerful utility from the compromised architecture whereby the kernel space while the user space resides in the same privilege ring. Even though myriad hybrid architectures exist, the ultimate objective of this proposal is to satisfy one intrinsic feature: incorporate superiority behavior of the hardwareassisted virtualization.

\end{abstract}


\keywords{virtual processor, hybrid processor, algorithm, virtualization, CPU machine}

\begin{textblock*}{18cm}(1cm,1cm) % {block width} (coords) 
\textcolor{GJBlue}{\LARGE Global Journals \LaTeX\ JournalKaleidoscope\texttrademark}
\end{textblock*}

\begin{textblock*}{18cm}(1.4cm,1.5cm) % {block width} (coords) 
\textcolor{GJBlue}{\footnotesize \\ Artificial Intelligence formulated this projection for compatibility purposes from the original article published at Global Journals. However, this technology is currently in beta. \emph{Therefore, kindly ignore odd layouts, missed formulae, text, tables, or figures.}}
\end{textblock*}


\let\tabcellsep& 	 	 		 
\section[{Introduction}]{Introduction}\par
irtualization technology has recovered a substantial devotion for some time in computer system designing. Virtual Machines found a path of arrangement for encompassing latest server consolidations, secure computing and also transparent migration, and list the current to a system that maintains capability of the latest operating systems. In this analysis, the method of virtual processor based on hybrid process is seen in the presentation of computer systems that change level of parallel in multiple threads per node. The major goal of this research to analysis a virtual processor based on hybrid process. The research will further focus on the software and hardware processing on virtual processor based on hybrid process for a computer and multispectral methods. To arrive at the final goal of the research, the paper will be divided into three parts. The first part will be an analysis of a virtual processor, the second part will be a presentation on hybrid processor and the third will be an analysis of virtual processsor based on hybrid process. If a virtual processor has a hybrid system of plurality storage device attached, a thread can be utilized in hybrid system/CPU. Therefore, a task could heavily occupy the available hardware in the virtual system. 
\section[{II. related work}]{II. related work}\par
According to Hoff beck, et. al "on a similar accession, the increasing thickness of power and wickedness o the latest servers has also projected numerous methods to Operating system directed control on energy consumption of the computer" (78). Though the energy management approaches are developed for legacy operating systems with a monolithic kernel. In most cases, monolithic kernels possess control of all the hardware devices and their mode of operation. It controls both energy ingesting and device activity to meet limitations of energy. Monolithic kernels controls the low in the system by tracing the power ingesting at individual level and also limit its specific sill in the process of device allocation to attain inclusive energy management (79) \hyperref[b0]{[1]}.\par
Virtualization is an abstraction layer (SW) that furs physical features of computing platform from the users, in its place showing another intangible, rivaled computing platform. Machine virtualization is about the creation and management of VMs on a "real" machine. For example Java Virtual Machine to accept java byte code in the form .class files. Virtual PC allows Windows app to be run on Mac/PowerPC, Sun PC SW emulates a PC how environment on Solaris/SPARC(Zhang, W Liang, and H Qiao, 195) \hyperref[b1]{[2]}.\par
A virtual CPU is allocated to a virtual machine. Virtual machines are automatically allocated a virtual central processing unit each. The CPU scheduler allocates execution settings in case the physical hosts possess numerous CPU cores. The vCPU becomes a sequence of time slots on logical processors (Katz, 6). It is significant for the administrator to comprehend the cloud of the usage of vCPU in an invoice since the dispensation time is billable. Adding more vCPU insignificantly advance the performance since the number when the number vCPUs raises, it gets hard for the scheduler to arrange many on the same CPUs (Chritoph et. al, 65) \hyperref[b2]{[3]}.\par
In most cases, vCPUs are a source of the symmetric multi-processing (SMP) multi-threaded model of the computer. SMp allows threads to pass across numerous logical cores to advance performance of similar tasks. vCPUs also on the same note allows multitasking to take place consecutively in physical environment V A Distributed Application provides processing functionality that practice varied workload behavior. The user group retrieving the application is, thus, probable in size, but accesses the functions given by the application inversely. Whereas most of the purposes are used correspondingly over time and, thus, undergo Static Workload, some Processing Components experience Periodic Workload, Changeable Workload, or Unceasingly Changing Workload (Lesnik, et.al, 1524).The Processing Mechanisms experiencing changing workloads are provisioned in an elastic cloud. Loose Connection is ensured by switching information between the hosting settings asynchronously via messages.\par
A VM performs SW in the similar way as the machine for which the SW was established.VM is applied as a mixture of actual machine and virtualizing software. The VM can have diverse resources diverse from the real machine either in quantity or type (cpu, mem, I/O, etc). A VM frequently offers a less perf than thesameactual machine operating the same SW.\par
Use of actual system calls to perform the functions given by VM instructions. Mapping of virtual state to actual resources. VM has two types which include: System VM operating as OS and process VM operating as a user process. VM monitor provide a total environment backup of various user processes, offering them entree to I/O devices, and acknowledge GUI of the desktop (Babic, Matej, 37) \hyperref[b3]{[4]}.\par
In any case, when running an operating system is installed on the server, the system always analyses the overall number of operations it can manage simultaneously by encompassing the total number of processors which are on the serve. In a case when operating systems are installed on the like which has eight or ten processors, every processor will have to manage two systems simultaneously. The system wills in total manage sixteen and twenty operations at a go consecutively. In the same way when an operating system is installed on a logical panel that accepts devoted processors, the operation system will then examine the total number/weight of the processes which it can concomitantly manage through examining the total number of devoted processors that are given to partition. In both scenarios, the system in operation can end lessly examine the total operations it can handle by including the whole number of processors that can be accessible  {\ref (Babic,} {\ref Matej,} {\ref 40)}  \hyperref[b3]{[4]}.\par
According to Blanchet and Dupouy, "When an operation system is inserted on a sound partition that allows joint processes, the system will have to examine the slight number from the total number of processing units and are availed to a portion" (179) \hyperref[b4]{[5]}. The server represents the processing power obtainable to the operating system on the while number of processors. The scenario permits the computation of the total number of multiple existing operations that it can handle. Virtual processor is referred as a symbol of physical processor of a working system of logical par that permits joint processors. Processing units are coincidently allocated by the server firmware among the virtual processors allocated to reasonable part. In a given scenario when a logical partition entails one point eight processing and two processors, it will be discovered that each virtual processor will have zero point nine (0.9) processing units helping its workload   Virtual processor has limitation of processing units. I a normal case, each virtual processor should only have 0.1. When firmware is FW760 or more, the minimum number of processing units will also decrease to 0.05. The extreme number of processing units each processor should have is 1.00. This amounts to a logical partition that can employ more processing units as compared to virtual processors which is available (Morris and Detlefsen, 67).\par
If the total number of virtual processor nearly to number of processing units available to the logical part, a logical partition always works very excellent. The enables the system of operation to accomplish a workload on logical partition efficiently. In certain scenarios, you can also be in place to increase system presentation somewhat b increasing the total number of virtual processors. If you upsurge the number of operations that operate concomitantly. On the same note, though you can upsurge the number of virtual processors minus altering the number of processing units, the restrictions of every operation operates will reduce. It is impossible for the running system to move processing power between processing powers dividing among processes the poses if the power of dividing among numerous virtual processors. 
\section[{III.}]{III.} 
\section[{Hybrid Virtual Processor}]{Hybrid Virtual Processor}\par
System virtualization is a technology which can divide a single host (e.g., computer, server, etc.), into multiple parts, or partitions, each running a separate instance, or image, of a working system. Instances of functioning systems or partitions are separate, or isolated, from each other in some ways. For example, the partitions have separate file systems, separate users, separate applications, and separate processes Bi and Liang, 197) \hyperref[b5]{[6]}. However, the partitions may also share some resources of the host. For example, the partitions can share the memory, the kernel, the processors, the hard drives, and/or other software, firmware, and/or hardware of the hos. Thus, each partition or instance of the operating system can look and feel like a separate server or machine from the perspective of its users. These instances are commonly referred to as "virtual" or "virtualized" machine and each partition may be referred to as a logical partition (LPAR)  {\ref (198)}.\par
One server or data processing system can generally host a number of LPARs. These LPARs generally have virtual resources assigned to them (e.g., virtual processors) which provide an abstraction of the physical resource from which it is based (e.g., the physical processor). For example, a virtual resource may be considered a logical entity that is backed up by the physical entity. In a dedicated mode of LPAR operation, physical resources are assigned as a whole to an LPAR such that the assigned physical resources are not shared by other LPARs (Hoff beck, et.al, 78). In a shared mode of LPAR operation, the physical resources are part of a pool of resources which are shared among the LPARs. Additionally, LPARs can be configured to have a certain entitlement capacity representing a guaranteed physical resource capacity for the LPAR. LPARs may also be configured as capped or uncapped. In a capped mode, the resource capacity for the LPAR is capped at some value (e.g., its entitlement capacity). In an opened style, LPAR would surpass its entitlement capability after other shared resources are in place.\par
Cai, and Yan note that "Field programmable gate arrays (FPGAs) have been considered for either augmenting or replacing microprocessors in order to expand the limitations posed by the arithmetic logic units" (1005) \hyperref[b8]{[9]}. Wholesale replacement of microprocessors with FPGAs generally requires the entire recoding of operating systems. On the other hand, redesigning microprocessors to include FPGAlike architecture presents its own set of design errors.\par
According to Wang and Chen "Bywords of the current evelation give a technique, structure and processor program merchandise for hybrid virtual machine configuration management" (1097) \hyperref[b6]{[7]}. For example, in some embodiments, the method and technique includes: assigning to a major set of virtual properties linked with enabled possessions of a virtual apparatus a first priority; giving to a second set of virtual resources associated with the virtual appliance a second useless than the first use, where the first and seconds types when joined surpass the permitted resources for the virtual machine; charting the first types of virtual resources to a first known resource of a pool of shared physical resources assignable to the first and second sets of virtual properties, whereas the initial physical resource includes a anticipate dempathyequal to a second physical resource assigned to the virtual machine; and differently assigning the first physical resource to the first set of virtual resources (Blanchet and Dupouy, 178) \hyperref[b4]{[5]}.\par
In accordance with the present invention, a hybrid, modular processor package and method for developing a hybrid, modular data processing package from microprocessor and field programmable gate array (FPGA) technology combines a microprocessor, an FPGA, and a modular controller chip in order to obtain enhanced performance over that of the microprocessor (Zhang, W Liang, and H Qiao, 193) \hyperref[b1]{[2]}. The combination of the microprocessor, FPGA, and controller chips is effected by identifying and selectively routing the noncontrol pins of the respective chips in parallel to the hybrid package pins and routing respective control pins of the microprocessor and FPGA through the controller pins. The controller chip emulates the behavior of the selected microprocessor bus interface and provides a set of services to the FPGA, such as configuration and memory management. By creating a standard interface to the FPGA and different microprocessor bus interfaces, a configuration code compatible family of computing devices can be created.\par
According to Salem, et al "Personifications of the current disclosure allow improved empathy levels keep maintained to physical resources in a shared resource pool environment" (5) \hyperref[b7]{[8]}. Embodiments of the present disclosure utilize a prioritization scheme to assign a higher priority to entitlement virtual resources than to virtual resources utilizing uncapped excess resources of the pool (Cai, and Yan, 1003) \hyperref[b8]{[9]}.\par
Physical resources having a desired or greatest affinity level to a physical resource of interest are mapped to the high priority virtual resources. In response to the dispatch of a high priority virtual resource, a physical resource allocation preference is given to the high priority virtual resource over a virtual resource that may be utilizing the mapped physical resource in an uncapped, shared mode.\par
Venkata, et al note that "Features of the current disclosure can be personified as a system after being acknowledged by a given skill. Consequently, features of the current disclosure can take the form of a complete hardware personification, an embodiment joining features of hardware and software, a total software embodiment like circuit, module or system" (4748) \hyperref[b9]{[10]}. On the same note, the new disclosure can take the form of processor program product personified in additional clear mediums of computers taking computer clear program code personified\par
The mixture of more processor usable or computer readable mediums is utilized. Computer readable medium is a computer legible signal medium stowing medium. In any case the processor readable storage medium is electronic, inferred, optical, magnetic, apparatus, devices semiconductors system. Other examples include: an electric having more wires, portable computer diskette, flash memory, hard disk, optical fiber, optical storage device, magnetic storage compact disc read only memory mention but a few. A computer has a readable storage medium which is a tangible medium that stores program for use by an instruction execution device (Hewlett and Wright, 983) \hyperref[b10]{[11]}.\par
Computer readable signal medium entails a spread data with system readable program code personalized within. This include: part of a carrier wave. Propagated signals of this kind are of different types including optical, electro-magnetic and many others. A virtual processor decipherable indication medium is in any computer clear medium that is not a virtual processor readable storage medium band that connect and conveyance a program for use by linking with a training device and execution system. A program core put on a processor legible medium is comminuted using a suitable medium like RF, wireless, optical fibre cable and a combination of all the above (Zhang, Liang and Qiao, 190) \hyperref[b1]{[2]}.\par
Lesnik et al assert that " features of the current disclosure are labeled with reference to flowchart and diagram of devise, gear, computer program products and system as paper the personifications of the disclosure" (1523). It is understood that the flow of the flowchart picture, the flowchart diagram, illustration and ampule be applied by computer program instructions. These instruction of the processor are given to a computer for a distinct purpose and any other programmable data processing device to give out a machine, such that the commands that execute via a computer devices and programmable data processing device which create ways of applying the functions mentioned in the flowchart (1525).\par
According to Babic, Matej "In a method for providing concurrent access to virtual memory data structures, a lock bit for locking a virtual page data structure is provided in a page table entry of a page table" (38). The page table is configured to map virtual pages to physical pages. Then, a first thread specifying an operation on the virtual page data structure is received. The first thread is provided exclusive access to the virtual page data structure by setting the lock bit in the page table entry such that other threads are prevented from accessing the virtual page data structure. A wait bit also may be provided in the page table entry to indicate that one or more of the other threads are in a wait queue when the first thread contains limited access to the data program. When the first thread no longer needs exclusive access to the data structure, a second thread is selected from among the other threads and is provided with limited access to the data configuration (39).\par
The computer program directives put onto programmable data dispensation apparatus to source a sequences of the ladder of operation to be done on the computer so as to yield a programmable device  
\section[{Virtual Processor Based on Hybrid Processor}]{Virtual Processor Based on Hybrid Processor}\par
A computer program has a code for performing out virtual processes for structures of the current disclosure is shown in various of programming languages with a target of programming languages like conventional technical programming languages (comparable software design languages and Cprogramming language), Smalltalk and Java. The program code performs completely on the computer of the user, partly on the computer of the used as software set, partially on a remote processor and on a remote processor completely. According to Blanchet and Depouy " In a given situation, the remote computer can be linked to the user of the computer over a given network, a local area network or far reaching network and by linking can be made to an outside virtual processor for example over the internet employing internet service distributor \hyperref[b4]{[5]}.\par
processes for applying the acts started in the flowchart (Dhas, and Kumanan, 9) \hyperref[b11]{[12]}.\par
A virtual processor has a reconfigurable, programmable logic matrix array for processing data in accord with a hardware encoded algorithm, a memory for storing a number of hardware configuration records for the programmable logic matrix array, each configuration file for programming an algorithm to be performed by the matrix array, an input/output bus for providing data to the matrix array for dispensation and for procurement treated data from the matrix array, a memory expedient for storing data, a VPM regulator for monitoring the overall procedure of the virtual processor plus giving operation arrangement maps, providing parameters for precise operations, and offering status information, a data bus manager for controlling the flow of the data to the matrix array for processing, and also configuration supervising the order of reconfiguration of the matrix array to route data by a specific order of algorithms  {\ref (Rodic,} {\ref Peteret et al,} {\ref 30)}[13].\par
The figure below illustrates a computer system including a hybrid data processor.\par
There block diagram of data processing system 100 which includes hybrid, modular data processor 101. Hybrid data processor 101 connects conventionally to a conventional memory unit 103 through data/control Input/output (I/O) buses 105. Address controller 107 receives address and control instruction information from processor 101 over buses 109, and conventionally controls the addressing of data within memory device 103 by hybrid data processor 101 utilizing buses 110.\par
A computer has two forms of storages which include: the Primary storage and secondary storage. The virtual processor closely relates with the major memory, involving the instructions and data. In examining the preparation of the CPU in the virtual machine monitors hypothetically. A virtual processor memory temporally holds data when a virtual processor processes a program. Secondary program clasps permanent and semi-permanent data on the outward magnetic medium. There are two kinds of virtual machines in the system which includes: the highthroughput and the concurrent. The virtual machine is put as synchronized type when all of the workload is synchronized submissions so as to minimize the cost of synchronization.\par
The main storage which is also referred to as memory which also has different terms like main memory, main storage, internal storage, and primary memory. The terms are used interchangeably by computer specialists on those well versed with computer programs. Memory is portion of the virtual processor that grips data and guidelines for dispensation. Keeping items in retention when the database is not operating feasible. Though the memory is associated with the central processing unit closely; it is distinct from other items. Memory keeps program and the command in the whole process of operation.\par
To manage the issue, hybrid scheduling framework is given for CPU management in the VMM to adjust to the variety of VMs running concurrently on the machine.\par
However, implementation of a hybrid scheduler was founded on Xen and the outcome show that hybrid CPU management technique is also predictable to alleviate the negative impact of the virtualization on synchronization and advance the performance of synchronized application in the virtualized scheme in upholding the presentation of high all through the application (Stampar, Simon, et al, 113) \hyperref[b12]{[14]}.\par
According to Zitter, Ilya, and Aimee Hoeve "With virtualization skill, the functionality of several standalone processor systems can be combined into a sole hardware processor, to promote effective usage of the hardware whereas reducing power depletion" (78)  {\ref [15]}. As a consequence, virtualization is a significant brick for structuring the cloud substructure for example the computer elastic of Amazon. Currently, a virtual machine monitor (VMM) is sedentary between the working system level and the hardware level in the virtualized system, instances of system virtualization comprise Xen, Hyper-V, VMware, Virtual Box and KVM. Diverse from the outdated system software stack. 
\section[{IV.}]{IV.} 
\section[{Experiments and Analysis a) Virtual processor and hybrid processor}]{Experiments and Analysis a) Virtual processor and hybrid processor}\par
The technology of virtualization creates it possible that different guest functional system operate on virtual machine. The virtual processor based on Table  {\ref 1}: Format hybrid data processor maintaining part of the system consuming time to the weight of operation, exhausting the system volume. Though this type of arrangement makes it worse in the performance if at all the virtual machine which is aligned to hybrid system of operation can be used to finalize the applications of equal programs (McDowall, Wil, 63) \hyperref[b13]{[16]}.\par
Preparation of a synchronous virtual processor based on hybrid process preparation strategy leads to enough physical virtual time when the system workload is synchronized. The diskettes and CD-ROM disk are secondary storages in giving a hybrid development framework for the virtual processor setting up a machine up in a virtual monitor. The storage device is put as a high throughput from as the default then the virtual traits of lesser storage system control the as data is prearranged. In implementing the hybrid development framework built on Xen, the recital of the presented arrangement framework and plan based on the multicore stage and the test portrays the scheduling framework and strategy to advance the performance of the virtual machine system (Leupers, Eeckhout, et al, 718) \hyperref[b14]{[17]}.\par
(Blanchet and Dupouy note that "Virtual machines (VMs) with a diversity of assignments may run concurrently on a virtual machine in the cloud platform" (1216). The arrangement algorithm used in Xen schedules virtual hybrid based processor of a VM asynchronously and assurances the quantity of the processor time allocated to the VM. As a significant keystone for clouds, virtualization plays a vigorous role in building this developing of both hybrid and virtual processor (1217) \hyperref[b4]{[5]}.\par
Blanchet, Gerard et al note that "when workloads in VMs are concurrent applications like multithreaded programs with the synchronization process, it has been established that this type in the VMM can decrease the presentation, due to the undesirable effect of virtualization on synchronization" (178). This proportional sharing (PS) method is helpful as it shortens the application of CPU arrangement in the virtual machine monitor (VMM), and can convey nearnative performance for certain workloads. Prior to the executing of instruction, processor instructions and data has to be put in the memory from an input system and a lesser storage system (the procedure is in addition complex by the element that, as noted earlier, the data will automatically make a provisional stop in a record) (180) \hyperref[b4]{[5]}.\par
According to Acosta, Eric, and Alan Liu "A virtual hybrid based processor system using a special instruction inserted into a thread (virtual processor) at a selected point to trigger an immediate thread change (i.e., transfer of virtual processor control to hybrid process)" (1099)  {\ref [18]}. When the virtual processor processes a hybrid instruction, the task thread surrenders control of the virtual processor, and an otherwise idle thread is selected by a thread scheduling mechanism of the MVP system for loading into the physical processor. V. 
\section[{Conclusion}]{Conclusion}\par
Virtualization technology has improved a large devotion for some time in computer system designing. Virtual Machines found a passageway of collection for about latest server consolidations, secure computing and also transparent migration, and list the current to a system that maintains the capability of the latest operating systems. In this analysis, the method of virtual processor based on the hybrid process is seen in the presentation of computer systems that change the level of parallel in multiple threads per node. The major goal of this research to analysis a virtual processor based on hybrid process. The research further focused on the software and hardware processing on virtual processor based on the hybrid process for a computer and multispectral methods. We arrived at the final goal of the research, the paper divided into three parts. The first part I an analysis of a virtual processor, the second part I displayed on the hybrid processor and the third part I analyzed of virtual processor based on hybrid process. If a virtual processor has a hybrid system of plurality storage device attached, a thread can be utilized in hybrid system/CPU. Therefore, a task could heavily occupy the available hardware in the virtual system. System virtualization is a technology which can divide a single host (e.g., computer, server, etc.), into multiple parts, or partitions, each running a separate instance, or image, of a working system. Instances of functioning systems or partitions are separate, or isolated, from each other in some ways.\par
A computer has two forms of storage which include: the Primary storage and secondary storage. The virtual processor closely relates with the major memory, involving the instructions and data. In examining the preparation of the CPU in the virtual machine monitors hypothetically.\par
Preparation of a synchronous virtual processor based on hybrid process preparation strategy leads to  \begin{figure}[htbp]
\noindent\textbf{1}\includegraphics[]{image-2.png}
\caption{\label{fig_1}Fig. 1 :}\end{figure}
 \begin{figure}[htbp]
\noindent\textbf{2}\includegraphics[]{image-3.png}
\caption{\label{fig_2}Fig. 2 :}\end{figure}
  \begin{figure}[htbp]
\noindent\textbf{2} \par 
\begin{longtable}{}
\end{longtable} \par
 
\caption{\label{tab_0}Table 2 :}\end{figure}
 			\footnote{© 2019 Global JournalsVirtual Processor Based on Hybrid Processor} 		 		\backmatter  			 \par
enough physical virtual time when the system workload is synchronized. The diskettes and CD-ROM disk are secondary storages in giving a hybrid development framework for the virtual processor setting up a machine up in a virtual monitor.			 			  				\begin{bibitemlist}{1}
\bibitem[
			Christoph
		 ()]{b2}\label{b2} 	 		\textit{},  		 			Christoph 		.  	 	 		\textit{Cloud Computing Patterns. Springer}  		2014. p. .  	 	 (Print) 
\bibitem[Acosta and Liu ()]{b15}\label{b15} 	 		‘A Pipeline Virtual Environment Architecture for Multicore Processor Systems’.  		 			Eric Acosta 		,  		 			Alan Liu 		.  	 	 		\textit{The Visual Computer}  		2012. 28 p. .  	 	 (Print) 
\bibitem[Wang ()]{b7}\label{b7} 	 		‘A System-Level Network Virtual Platform for IPsec Processor Development’.  		 			Chen Wang 		.  	 	 		\textit{Ieice Transactions on Information and Systems}  		2013. 96 p. .  	 
\bibitem[Venkata ()]{b10}\label{b10} 	 		‘Design and Implementation of Scheduler for Virtual File Systems in Shared Memory Multi-Core Processor Using Arm-Fl2440’.  		 			Venkata 		.  	 	 		\textit{International Journal of Control Theory and Applications}  		2016. 9 p. .  	 	 (Print) 
\bibitem[Hewlett et al. ()]{b11}\label{b11} 	 		‘Dynamic Monitoring Efficiency of Computer Processor Virtual Memory Management Data Structures’.  		 			Wright ; Hewlett 		,  		 			R Company 		,  		 			Wright 		.  	 	 		\textit{Research Disclosure}  		2012. 2012. p. 983.  	 	 (Print) 	 (Research Disclosure.) 
\bibitem[Mcdowall ()]{b14}\label{b14} 	 		‘Exploring Possible Transition Pathways for Hydrogen Energy: A Hybrid Approach Using Socio-Technical Scenarios and Energy System Modelling’.  		 			Will Mcdowall 		.  	 	 		\textit{Futures}  		2014. 63.  	 	 (Print) 
\bibitem[Zitter and Hoeve ()]{b13}\label{b13} 	 		\textit{Hybrid Learning Environments: Merging Learning and Work Processes to Facilitate Knowledge Integration and Transitions},  		 			Ilya Zitter 		,  		 			Aimee Hoeve 		.  		2012.  	 	 (Print) 
\bibitem[Hoffbeck ()]{b0}\label{b0} 	 		‘Interfacing Matlab with a Parallel Virtual Processor for Matrix Algorithms’.  		 			Hoffbeck 		.  	 	 		\textit{The Journal of Systems \& Software}  		2001. 56 p. .  	 	 (Print) 
\bibitem[Cai ()]{b9}\label{b9} 	 		‘Labview-based Parallel Optimization of Networked Virtual Test System in Multi -Core Processor Environment’.  		 			Yan Cai 		.  	 	 		\textit{Advanced Materials Research}  		2012. p. .  	 	 (Print) 
\bibitem[Babic ()]{b3}\label{b3} 	 		‘New Hybrid System Using in Modeling Process of Hardening with Intelligent System’.  		 			Matej Babic 		.  	 	 		\textit{Acta Mechanica Slovaca}  		2016. 20 p. .  	 	 (Print) 
\bibitem[Zhang ()]{b1}\label{b1} 	 		‘Processor Coalition Algorithm for Virtual Routers on a Multiprocessor System’.  		 			Liang Zhang 		,  		 			Qiao 		.  	 	 		\textit{Advances in Information Sciences and Service Sciences},  				2012. 4 p. .  	 	 (Print) 
\bibitem[Bi ()]{b6}\label{b6} 	 		‘Processor Coalition Algorithm for Virtual Routers on a Multiprocessor System’.  		 			Liang Bi 		.  	 	 		\textit{Advances in Information Sciences and Service Sciences},  				2012. 4 p. .  	 	 (Print) 
\bibitem[Rodic ()]{b12}\label{b12} 	 		‘Study of a Sol-Gel Process in the Preparation of Hybrid Coatings for Corrosion Protection Using Ftir and [sup] 1h Nmr Methods’.  		 			Peteret Rodic 		.  	 	 		\textit{Journal of Non-Crystalline Solids}  		2014. 2013. 59 p. .  	 	 (Print 15. Stampar) 	 (Strojniski Vestnik. Print) 
\bibitem[Salem ()]{b8}\label{b8} 	 		‘The Development of Body-Powered Prosthetic Hand Controlled by Emg Signals Using Dsp Processor with Virtual Prosthesis Implementation’.  		 			Salem 		.  	 	 		\textit{Conference Papers in Engineering}  		2013. 2013. 4 p. .  	 	 (Print) 
\bibitem[Blanchet ()]{b4}\label{b4} 	 		\textit{Virtual Memory},  		 			Dupouy Blanchet 		.  		2013. p. .  	 	 (Print) 
\bibitem[Blanchet ()]{b5}\label{b5} 	 		\textit{Virtual Memory},  		 			Ge?ard Blanchet 		.  		2013. p. .  	 	 (Print) 
\end{bibitemlist}
 			 		 	 
\end{document}
